 |
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
|
| If you can't view the Datasheet, Please click here to try to view without PDF Reader . |
|
|
| Datasheet File OCR Text: |
| (R) ESDA6V1-4BC6 QUAD BIDIRECTIONAL TRANSIL SUPPRESSOR FOR ESD PROTECTION Application Specific Discretes A.S.D.TM APPLICATIONS Where transient overvoltage protection in ESD sensitive equipment is required, such as : COMPUTERS PRINTERS COMMUNICATION SYSTEMS VIDEO EQUIPMENT This device is particularly adapted to the protection of symmetrical signals. s s s s SOT23-6L (SC-74) DESCRIPTION The ESDA6V1-4BC6 is a monolithic array designed to protect up to 4 lines in a bidirectional way against ESD transients. The device is ideal for situations where board space is at a premium. FEATURES s s FUNCTIONAL DIAGRAM SOT23-6L 1 2 6 5 s s s s 4 BIDIRECTIONAL TRANSIL FUNCTIONS ESD PROTECTION FOR DATA, SIGNAL AND VCC BUS STAND OFF VOLTAGE RANGE: 5 V LOW LEAKAGE CURRENT PEAK PULSE POWER (8/20s); 80W CHANNEL SEPARATION: 80dB typ.@20KHz 3 4 BENEFITS s s s High ESD protection level High integration Suitable for high density boards COMPLIES WITH THE FOLLOWING STANDARDS: - IEC61000-4-2: 15 kV (air discharge) 8 kV (contact discharge) - MIL STD 883E-Method 3015-7: class3 (human body model) November 2002 - Ed: 1A 1/5 ESDA6V1-4BC6 1. ESD protection by ESDA6V1-4BC6 With the focus of lowering the operation levels, the problem of malfunction caused by the environment is critical. Electrostatic discharge (ESD) is a major cause of failure in electronic system. Transient Voltage Suppressors are an ideal choice for ESD protection and have proven capable in suppressing ESD events. They are capable of clamping the incoming transient to a low enough level such that damage to the protected semiconductor is prevented. Surface mount TVS arrays offer the best choice for minimal lead inductance. They serve as parallel protection elements, connected between the signal line to ground. As the transient rises above the operating voltage of the device, the TVS array becomes a low impedance path diverting the transient current to ground. Bidirectional protection for 0V biased signals. DRIVER CONNECTOR 1 2 6 5 3 4 The ESDA6V1-4BC6 array is the ideal product for use as board level protection of ESD sensitive semiconductor components. The tiny SOT23-6L package allows design flexibility in the design of "crowded" boards where the space saving is at a premium. This enables to shorten the routing and can contribute to improve ESD performance. 2. Circuit Board Layout Circuit board layout is a critical design step in the suppression of ESD induced transients. The following guidelines are recommended : The ESDA6V1-4BC6 should be placed as near as possible to the input terminals or connectors. Minimise the path length between the ESD suppressor and the protected device Minimise all conductive loops, including power and ground loops The ESD transient return path to ground should be kept as short as possible. Use ground planes whenever possible. s s s s s 2/5 ESDA6V1-4BC6 ABSOLUTE MAXIMUM RATINGS (Tamb = 25C) Symbol VPP Test conditions ESD discharge - MIL STD 883C - Method 3015-6 IEC61000-4-2 air discharge IEC61000-4-2 contact discharge Peak pulse power (8/20s) Junction temperature Storage temperature range Lead solder temperature (10 second duration) Operating temperature range (note 1) Value 25 15 8 80 150 -55 to +150 260 -40 to +125 Unit kV PPP Tj Tstg TL Top W C C C C Note 1: Variation of parameters is given by curves. ELECTRICAL CHARACTERISTICS (Tamb = 25C) Symbol VRM VBR VCL IRM IPP C Rd Parameter Stand-off voltage Breakdown voltage Clamping voltage Leakage current Peak pulse current Capacitance Dynamic resistance VBR Type min. V ESDA6V1-4BC6 Note 1 : Square pulse, Ipp = 3A, tp=2.5s. Rd I VBR VCL V RM I RM V I PP @ IR IRM @ VRM max. Rd typ. note 1 T max. 10 /C 3 -4 C typ. 0V bias pF 45 max. V 8 mA 1 A 1 V 3 0.45 6.1 Fig. 1: Relative variation of peak pulse power versus initial junction temperature. PPP[Tj initial] / PPP[Tj initial=25C] 1.1 1.0 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.0 0 25 50 75 100 125 150 Fig. 2: Peak pulse power versus exponential pulse duration. PPP(W) 1000 Tj initial = 25C 100 Tj(C) 10 1 tp(s) 10 100 3/5 ESDA6V1-4BC6 Fig. 3: Clamping voltage versus peak pulse current (typical values, rectangular waveform). IPP(A) 100.0 50 45 40 F = 1MHz VOSC = 30mV Tj = 25C Fig. 4: Junction capacitance versus line voltage applied (typical values). C(pF) 10.0 35 30 25 20 1.0 15 10 VCL(V) 0.1 0 5 10 15 20 25 30 35 40 tp = 2.5s Tj initial = 25C 5 0 VR(V) 0 1 2 3 4 5 6 45 50 Fig. 5: Relative variation of leakage current versus junction temperature (typical values). IR[Tj] / IR[Tj=25C] 100 Fig. 6: Analog crosstalk test configuration. 50 VG Port 1 I/O1 unloaded GND 10 50 I/O6 Tj(C) 1 25 50 75 100 125 Port 2 Symbol ch Parameter Pin topic channel separation Conditions (see note 2) F = 20 KHz F = 10 MHz Values Min. Typ. 80 34 Max. Unit dB Note 2 : According to figure 6 schematic. ORDER CODE ESDA ESD ARRAY 6V1 4B C6 PACKAGE: C6: SOT23-6L (SC-74) VBR min. Bidirectional 4/5 ESDA6V1-4BC6 PACKAGE MECHANICAL DATA SOT23-6L A REF. DIMENSIONS Millimeters Min. Typ. Max. Min. 1.45 0.035 0.10 0 1.30 0.035 0.50 0.0137 0.20 0.004 3.00 0.95 2.60 0.10 3.00 0.102 0.60 0.004 10 0.11 0.0374 0.118 0.024 10 1.75 0.059 Inches Typ. Max. 0.057 0.004 0.0512 0.02 0.008 0.118 0.0689 E A2 A e D 0.90 0 0.90 0.35 0.09 2.80 1.50 A1 b A2 b c D E e H e C A1 H L L FOOTPRINT 0.60 0.024 MARKING Type 1.20 0.047 Marking BS77 ESDA6V1-4BC6 Packaging: Standard packaging is tape and reel. 3.50 0.138 2.30 0.090 mm inch 1.10 0.043 0.95 0.037 Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics. The ST logo is a registered trademark of STMicroelectronics (c) 2002 STMicroelectronics - Printed in Italy - All rights reserved. STMicroelectronics GROUP OF COMPANIES Australia - Brazil - Canada - China - Finland - France - Germany Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore Spain - Sweden - Switzerland - United Kingdom - United States. http://www.st.com 5/5 |
Price & Availability of ESDA6V14BC6
 |
|
|
|
|
All Rights Reserved © IC-ON-LINE 2003 - 2022 |
| [Add Bookmark] [Contact Us] [Link exchange] [Privacy policy] |
|
Mirror Sites : [www.datasheet.hk]
[www.maxim4u.com] [www.ic-on-line.cn]
[www.ic-on-line.com] [www.ic-on-line.net]
[www.alldatasheet.com.cn]
[www.gdcy.com]
[www.gdcy.net] |